I've been wondering about this for a while.... have you tried?
I'm not a EEG designer but I've experimenting and learning about it. Sounds like you make PiEEG? This is really cool and I appreciate the docs on the github.
After amplification, you could get the signal 0-100uV to ~0-Vanalog; so then the entire 8-bit range could ideally be used. Realistically, after filtering, due to roll-off / artifacts one could probably use 3/4ths of that space -- so ~ 192 voltage levels that can be determined by the ADC per sample. Does this sound right?
It'd probably depend on what level of control / reliability one would want from the EEG data; I imagine that you could probably cut a lot of corners if, say, you were only measuring for hemispheric coherence in a small set of frequency bands, or stages of REM sleep (and maybe ERPs like p300).
I don't know, this is in my upcoming experiments. Originally this was an attempt to build an EEG amplifier / filter circuit for an atmega328p 10-bit ADC but for my purposes I settled for a 12-bit (and possibly hardware oversampling) on an EFM32.