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Lots of things in here which kill me a little:

1. You don't get a voltage spike when you disconnect an inductor. The field collapses and induces a current. If you measure it across a high impedance then it looks like a voltage spike. If you measure it across a low impedance then it's not necessarily much of a spike. Ergo depends on load impedance.

2. SMPS designs are not necessarily noisier than linear power supplies. It's always a design trade off. In fact you see SMPS in all modern RF test gear which is generally far more sensitive and has far more bandwidth than anything back when linear supplies were common. Also there is a lot of noise coming off the diodes in a basic bridge rectifier as well! Noise is a whole-system design consideration that has to be made.

3. Don't use any LLMs for designing circuits. Please go read a book on it designed by experts, not stuff scraped from thousands of idiots. I've seen some horrible stuff out there.

4. I'm sure I'll come up with more over time.



> If you measure it across a high impedance then it looks like a voltage spike. If you measure it across a low impedance then it's not necessarily much of a spike.

"Disconnect" implies an open circuit and high impedance.


No, it’s the input that’s disconnected


Irrelevant. If it's not an open circuit, then the inductor is connected to things in parallel, and the impedance increase creates a voltage spike. If the load impedance is significantly lower than the thing being disconnected, then you're just disconnecting something that doesn't matter to the circuit and it's silly to be that pedantic about an irrelevant situation. You're bending the statement from "disconnecting an inductor" to "disconnecting something from an inductor (while something else is still connected)"


A voltage spike between what two points in the circuit?


This is really nit-picky.

The fundamental action of a boost converter is from the inductors "voltage spike" behavior. The lowest noise linear regulator is less noisy than the lowest noise smps.

I agree though that LLM's are not good at circuit design.


If you measure any voltage at low impedance, you'll suddenly have a massive spike of current that will blow out your fuses, drain your battery/capacitor/inductor, or blow your measurement device


It would actually charge your inductor. The energy stored in an inductor is proportional to current running through it. This is key to the action of a boost converter.

The physical equivalent of an inductor is a flywheel, which makes it much easier to visualize.


My point is that measuring voltage with low-impedance is essentially introducing a short, which is not really a useful thing to do for most circuits. Bad things tend to happen.


5. Contrary to the article, FETs don't make suitable pass transistors for Zener regulators that rely on Vgs being relatively constant, the way Vbe is with bipolars. In fact, even with a proper feedback loop, most FETs make awful series regulators due to SOA limits.


While not generally available at this voltage level, SiC VJFETs do not have an SOA limit (on drain-source current and voltage; the p-n junction from the gate to the source-drain channel has current limits for non-capacitive current (i.e., forward conduction and reverse biased avalanche mode; though with a high enough gate impedance in the off-state the drain-source connection is avalanche proof to full drain current for as long as it takes for the channel to reach it's ~500C limit)).

It's generally sad that power JFETs are so neglected, because e.g. a normally-on switch in a buck eliminates the auxiliary startup supply, and the absence of a gate oxide allows designing with the junction's clamping activity in mind. Also the forward conduction gate-source is a diode temperature sensor literally right at the channel.




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